Attached patch for svm will enable a tlb flush for each vmrun.

Setting the tbl_control flag to 1 in the vmcb, causes a complete tlb
flush on this core.  We have seen issues (blue screens) when utilizing
ASID granularity with WinxpSP1 running on cores>0.  we have found that
flushing the TLBs each vmrun alleviates winxpsp1 crashes.  We have also
sometimes seen a substantial performance improvement(!) when flushing
each vmrun, which was completely unexpected.  We are continuing to
investigate root cause, but for the moment, we would like to just flush
each vmrun. Digging around in the SPT code might be necessary here also.

Signed-off-by: Tom Woller <thomas.woller@amd.com>

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index ba99592b6fe267ee1bcf10daec5026ff8ce6521e..b7bccf9b9980bdb075710f9473290cbe284bf170 100644 (file)
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -2317,7 +2317,7 @@ asmlinkage void svm_vmexit_handler(struct cpu_user_regs regs)
     save_svm_cpu_user_regs(v, &regs);
     v->arch.hvm_svm.injecting_event = 0;
 
-    vmcb->tlb_control = 0;
+    vmcb->tlb_control = 1;
 
 #ifdef SVM_EXTRA_DEBUG
 {